CompoNano - ISSN 2516-3914 - © ISTE Ltd
Composants nanoélectroniques couvre les sujets suivants :
– Composants FD-SOI
– Composants Multi-Grilles sur substrats de Si massif ou sur isolant
– Composants à base de structures 1D
– Composants à base de structures 2D
– Composants Multi-Canaux
– Composants Small-Slope-Switches
– Composants très faible consommation
– Matériaux alternatifs pour les canaux des composants nanoélectroniques
– Conception, technologie, intégration, modélisation, simulation numérique
et caractérisation des composants nanoélectroniques
– Conception de circuits basés sur les composants nanoélectroniques
– Mémoires Non-Volatiles, DRAM, SRAM basées sur un stockage de charges
ou une variation de résistance (PCRAM, RRAM, MRAM)
Nanoelectronic Devices covers the following subjects :
– FD-SOI Devices
– Multi-Gate devices on bulk or insulator substrates
– 1D Devices (Nanowires, Carbon Nanotubes, etc.)
– 2D channel Devices
– Multi-channel Devices
– Small Slope Switches Devices (Tunnel FET, FeFET, NEMS, etc.)
– Ultra low power Devices
– Nanodevices with alternative channel materials
– Design, technology, integration, modelling, numerical simulation
of Nanoelectronic devices
– Circuit design based on nanoelectronic devices
– Charge-based and non-charge based (PCRAM, RRAM, MRAM)
DRAM, SRAM, and Non-Volatile Memories
This paper discusses the impacts of electric field and physical confinement around the pn-junction on the diffusion constant and carrier lifetime of various pn-junction devices fabricated on silicon-on-insulator (SOI) (...)
Les performances des circuits intégrés RF sont directement liées aux caractéristiques analogiques et haute fréquence des transistors, à la qualité des interconnexions métalliques ainsi qu’aux propriétés électromagnétiques du (...)
An analytical expression of free top surface charge sensitivity in FDSOI MOS structure has been established for weak inversion region and validated by TCAD numerical simulation. The influence of various FDSOI stack (...)
A gm/ID based methodology is detailed in this paper in order to help the designers to determine the optimum size of a capacitive feedback LNA by considering the design topology, the specifications to reach and the (...)
In this work we revisited the 22nm FDSOI technology for lowest power IoT, RF and mmWave applications. Ultra-low leakage and power devices are described, as part of the 22FDX® portfolio. Transistors performance is presented. (...)
FDSOI technologies are very promising candidates for future CMOS circuits as they feature low variability, improved short channel effect and good transport characteristics. In this paper, we review the main electrical (...)
Comité de rédaction
Rédacteur en chef
Francis BALESTRA
CNRS-Grenoble INP-Minatec
francis.balestra@imep.grenoble-inp.fr
Membres du comité
Frédéric ALLIBERT
SOITEC, Grenoble
frederic.allibert@soitec.com
Robert BAPTIST
CEA-LETI, Grenoble
robert.baptist@cea.fr
Olivier THOMAS
CEA-LETI, Grenoble
olivier.thomas@cea.fr